	US 12,266,044 B2
	Data structures, methods and tiling engines for storing tiling information in a graphics processing system
Xile Yang, Rickmansworth (GB); Robert Brigg, Watford (GB); and Michael John Livesley, Edinburgh (GB)
Assigned to Imagination Technologies Limited, Kings Langley (GB)
Filed by Imagination Technologies Limited, Kings Langley (GB)
Filed on Dec. 31, 2023, as Appl. No. 18/401,566.
Application 18/401,566 is a continuation of application No. 18/080,658, filed on Dec. 13, 2022, granted, now 11,861,782.
Application 18/080,658 is a continuation of application No. 17/172,313, filed on Feb. 10, 2021, granted, now 11,532,115, issued on Dec. 20, 2022.
Claims priority of application No. 2001794 (GB), filed on Feb. 10, 2020.
Prior Publication US 2024/0135625 A1, Apr. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06T 1/20 (2006.01); G06T 1/60 (2006.01); G06T 15/00 (2011.01)

CPC G06T 15/005 (2013.01) [G06T 1/20 (2013.01); G06T 1/60 (2013.01); G06T 2210/52 (2013.01)]

20 Claims

1. A method of tiling primitives in a tile based graphics processing system in which a rendering space is divided into a plurality of tiles, the plurality of tiles being grouped into a plurality of tile groups each comprising at least two tiles, the method comprising, for a tile group:

determining, for each tile of the tile group, which primitives of each of a plurality of primitive blocks intersect that tile, each primitive block comprising at least one primitive; and

storing in memory a control stream, the control stream comprising a fixed sized primitive block entry for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group, each primitive block entry identifying a location in memory of a control data block for the corresponding primitive block.