US 12,266,031 B2
Memory mapping of activations for convolutional neural network executions
Martino Dazzi, Zurich (CH); Pier Andrea Francese, Adliswil (CH); Abu Sebastian, Adliswil (CH); and Evangelos Stavros Eleftheriou, Rueschlikon (CH)
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Apr. 28, 2021, as Appl. No. 17/242,392.
Prior Publication US 2022/0350514 A1, Nov. 3, 2022
Int. Cl. G06N 3/08 (2023.01); G06N 3/063 (2023.01); G06T 1/60 (2006.01)
CPC G06T 1/60 (2013.01) [G06N 3/063 (2013.01); G06N 3/08 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory controller circuit for mapping data of a convolutional neural network to a physical memory, said memory controller circuit comprising:
a receiving unit to receive a selection parameter value; and
a mapping unit to map pixel values of one layer of said convolutional neural network to memory words of said physical memory according to one of a plurality of mapping schemas, wherein said mapping is dependent on said value of said received selection parameter value, and wherein the one of the plurality of mapping schemas is an intra-word adjacent mapping schema, and wherein bit values of portions of different pixel values are mapped to one physical memory word in a contiguous manner.