US 12,266,030 B2
Processing system with selective priority-based two-level binning
Anirudh R. Acharya, San Diego, CA (US); Ruijin Wu, Santa Clara, CA (US); and Young In Yeo, Santa Clara, CA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US)
Filed on Apr. 15, 2021, as Appl. No. 17/231,425.
Claims priority of provisional application 63/113,605, filed on Nov. 13, 2020.
Prior Publication US 2022/0156874 A1, May 19, 2022
Int. Cl. G06T 1/20 (2006.01); G06F 9/50 (2006.01); G06T 7/11 (2017.01)
CPC G06T 1/20 (2013.01) [G06F 9/5005 (2013.01); G06T 7/11 (2017.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
executing, by at least one processing unit of a system, a first workload in a first binning mode; and
executing, by the at least one processing unit, a second workload in a selected binning mode that is selected from one of the first binning mode and a second binning mode based on performance heuristics of the system.