US 12,265,778 B2
Method of detecting defective layer of semiconductor device and computing system for performing the same
Junghwan Kim, Hwaseong-si (KR); Insu Jang, Hwaseong-si (KR); Hyeonhwa Jang, Seoul (KR); and Ghilgeun Oh, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Dec. 1, 2021, as Appl. No. 17/539,697.
Claims priority of application No. 10 2020 0170749 (KR), filed on Dec. 8, 2020.
Prior Publication US 2022/0180040 A1, Jun. 9, 2022
Int. Cl. G06F 30/398 (2020.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 119/02 (2020.01)
CPC G06F 30/398 (2020.01) [G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 2119/02 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A method of detecting a defective layer of a semiconductor device including a plurality of layers performed by a computing system, the method comprising:
obtaining candidate defective layer information regarding a plurality of candidate defective layers and obtaining physical structure information regarding the candidate defective layers;
dividing each of wires in the candidate defective layers into virtual micro areas based on the candidate defective layer information and based on the physical structure information; and
identifying a defective layer from among the candidate defective layers according to a number of the virtual micro areas.