| CPC G06F 30/392 (2020.01) [G06F 30/323 (2020.01); G06F 30/398 (2020.01); G06F 2119/08 (2020.01)] | 20 Claims |
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1. A method, comprising:
providing an active area in an integrated circuit design layout;
grouping the active area into a first region and a second region;
calculating a first self-heating temperature of the first region of the active area;
calculating a second self-heating temperature of the second region of the active area;
determining an Electromigration (EM) evaluation based on the first self-heating temperature and the second self-heating temperature; and
generating a semiconductor device based on the integrated circuit design layout passing the EM evaluation,
wherein a height of the first region of the active area is different from a height of the second region of the active area.
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