US 12,265,767 B2
System and method for electronic circuit resimulation
Steven F. Hoover, Shrewsbury, MA (US)
Assigned to Steven Hoover, Shrewsbury, MA (US)
Filed by Steven F. Hoover, Shrewsbury, MA (US)
Filed on Aug. 22, 2022, as Appl. No. 17/893,136.
Claims priority of provisional application 63/235,289, filed on Aug. 20, 2021.
Prior Publication US 2023/0054303 A1, Feb. 23, 2023
Int. Cl. G06F 30/327 (2020.01); G06F 30/3308 (2020.01); G06F 30/367 (2020.01)
CPC G06F 30/327 (2020.01) [G06F 30/3308 (2020.01); G06F 30/367 (2020.01)] 8 Claims
OG exemplary drawing
 
1. A computer-implemented method for resimulating operation of a portion of a model representing an electronic circuit, the method comprising:
processing a hardware-description-language (HDL) description of the electronic circuit to determine a first partition comprising a first representation of a first group of circuit elements of the electronic circuit;
determining that the first partition is a candidate for resimulation;
receiving, from a first HDL model corresponding to the HDL description, first simulation data corresponding to values of signals in the first partition;
based on determining that the first partition is a candidate for resimulation, storing, in a cache memory, the first simulation data;
receiving an indication of a request to resimulate the first partition;
processing, using the first simulation data, a second HDL model corresponding to the first partition to determine second simulation data; and
displaying, on a computer display, at least a portion of the second simulation data.