| CPC G06F 13/1668 (2013.01) [G06F 1/10 (2013.01); G06F 11/1004 (2013.01); G11C 11/4076 (2013.01); G11C 11/4093 (2013.01)] | 20 Claims |

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1. An apparatus, comprising:
an external clock circuit configured to receive an external clock having an external frequency, wherein the external clock is shared with an external device;
a command circuit coupled to the external clock circuit and configured to receive commands from the external device;
a set of N pipelines configured to process a data unit, wherein each of the N pipelines is configured to process a unique portion of the data unit according to a channel-specific internal clock that is lower than the external clock, wherein N is greater than 1;
a read-state circuit coupled to the external clock circuit and the command circuit, the read-state circuit configured to:
identify the external clock as a sequence of alternating N number of pulses; and
generate one or more enable signals for representing a unique pulse of the N number of pulses a command is received on; and
a timing control circuit coupled to the read-state circuit and the set of N pipelines, the timing control circuit configured to:
maintain a separation in time between a first output sequence and a second output sequence that respectively correspond to a first received command and a second received command when the second received command follows the first received command.
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