US 12,265,444 B2
Systems and methods for detection of persistent faults in processing units and memory
Paul Kimelman, San Jose, CA (US); and Adam Fuks, San Jose, CA (US)
Assigned to NXP B.V., Eindhoven (NL)
Filed by NXP B.V., Eindhoven (NL)
Filed on Mar. 9, 2023, as Appl. No. 18/180,894.
Prior Publication US 2024/0303143 A1, Sep. 12, 2024
Int. Cl. G06F 11/07 (2006.01)
CPC G06F 11/0751 (2013.01) [G06F 11/073 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A Machine Learning (ML) processor, comprising:
one or more registers; and
a data moving circuit coupled to the one or more registers and configured to:
select, based upon a first value stored in the one or more registers, an original one of a plurality of parallel handling circuits within the ML processor to obtain an original data processing result; and
select, based upon a second value stored in the one or more registers, an alternative one of the plurality of parallel handling circuits to obtain an alternative data processing result that, upon comparison with the original data processing result, provides an indication of a persistent fault in the ML processor.