CPC G03F 7/094 (2013.01) [G03F 7/2004 (2013.01); H01L 21/0274 (2013.01); H01L 21/31144 (2013.01)] | 20 Claims |
1. A method of manufacturing a semiconductor device, comprising:
forming a first resist layer over a substrate;
forming a second resist layer over the first resist layer, wherein the second resist layer is a metal-containing resist;
patterning the second resist layer to expose a portion of the first resist layer to form a second resist layer pattern, wherein the patterning includes exposing the second resist layer to a scanning electron beam;
exposing the first resist layer to extreme ultraviolet (XUV) radiation diffracted by the second resist layer pattern; and
removing portions of the first resist layer exposed to the XUV radiation diffracted by the second resist layer.
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