US 12,265,296 B2
Driving backplane, manufacturing method thereof and display panel
Huayu Sang, Beijing (CN); Xiaodong Xie, Beijing (CN); Min He, Beijing (CN); Xue Zhao, Beijing (CN); Tianyu Zhang, Beijing (CN); Tengfei Zhong, Beijing (CN); Xinxiu Zhang, Beijing (CN); and Bin Pang, Beijing (CN)
Assigned to HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., Anhui (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/440,277
Filed by Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Jan. 22, 2021, PCT No. PCT/CN2021/073340
§ 371(c)(1), (2) Date Sep. 17, 2021,
PCT Pub. No. WO2022/088534, PCT Pub. Date May 5, 2022.
Claims priority of application No. 202011197976.4 (CN), filed on Oct. 30, 2020.
Prior Publication US 2022/0350199 A1, Nov. 3, 2022
Int. Cl. G02F 1/13357 (2006.01); H01L 25/075 (2006.01); H01L 33/62 (2010.01)
CPC G02F 1/133603 (2013.01) [H01L 25/0753 (2013.01); H01L 33/62 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A driving backplane, comprising:
a base substrate;
a first conductive layer on the base substrate;
a first planarization layer in a region of the base substrate outside a pattern of the first conductive layer;
a second planarization layer on a side of the first conductive layer and the first planarization layer distal to the base substrate;
a second conductive layer on a side of the second planarization layer distal to the base substrate, wherein an orthographic projection of the first conductive layer on the base substrate partially overlaps with an orthographic projection of the second conductive layer on the base substrate; and
a first insulation layer between the first planarization layer and the first conductive layer.