| CPC G01R 31/31901 (2013.01) [G01R 31/31701 (2013.01); G01R 31/31932 (2013.01)] | 20 Claims |
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15. A method of operating a digital circuit having N number of redundant flip-flops, each of the N number of redundant flip-flops having a data input coupled to a common data signal, the method comprising:
operating the digital circuit in a functional mode corresponding to a regular operation of the digital circuit, wherein, during the functional mode, the method comprises:
combining a functional output signal of each of the N number of redundant flip-flops using logic gates; and
providing a single functional output signal in a fault-tolerant, safety-critical system based on the combining; and
operating the digital circuit in a test mode corresponding to testing of various paths of the digital circuit, wherein, during the test mode, the method comprises:
arranging a first flip-flop of the N number of redundant flip-flops as part of a test path,
arranging N−1 number of the N number of redundant flip-flops as shadow logic by bypassing the N−1 number of the N number of redundant flip-flops from the test path, the N number of redundant flip-flops receiving a test pattern at the common data signal,
observing a test output signal at an output terminal of the first flip-flop to determine faults within a test path comprising the first flip-flop, and
observing test output signals of each of the N−1 number of redundant flip-flops to determine faults within the N−1 number of redundant flip-flops, wherein observing the test output signal at the output terminal of the first flip-flop and the test output signals of each of the N−1 number of redundant flip-flops are during a same test cycle.
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