US 12,265,076 B2
Complementary metal-oxide-semiconductor (CMOS) multi-well apparatus for electrical cell assessment
Donhee Ham, Cambridge, MA (US); Wenxuan Wu, Cambridge, MA (US); Jeffrey T. Abbott, Cambridge, MA (US); Henry Julian Hinton, Cambridge, MA (US); and Hongkun Park, Cambridge, MA (US)
Assigned to President and Fellows of Harvard College, Cambridge, MA (US)
Filed by President and Fellows of Harvard College, Cambridge, MA (US)
Filed on Aug. 19, 2022, as Appl. No. 17/891,964.
Application 17/891,964 is a continuation of application No. PCT/US2021/037604, filed on Jun. 16, 2021.
Claims priority of provisional application 63/040,412, filed on Jun. 17, 2020.
Prior Publication US 2023/0184739 A1, Jun. 15, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. B01L 3/00 (2006.01); G01N 33/487 (2006.01)
CPC G01N 33/48728 (2013.01) [B01L 3/50853 (2013.01); B01L 2300/0636 (2013.01); B01L 2300/0645 (2013.01); B01L 2300/0829 (2013.01)] 24 Claims
OG exemplary drawing
 
1. An apparatus for electrical assessment of a biological specimen, comprising:
a plate having a multiple-well array for disposing thereon the biological specimen, each well of the multiple-well array having a plurality of electrodes disposed therein;
a first substrate having a first surface facing wells of the multiple-well array of the plate and having a second surface opposite the first surface; and
a multiwell integrated circuit disposed on or in the first substrate, the multiwell integrated circuit comprising:
an array of reticle areas, each reticle area comprising complementary metal oxide semiconductor (CMOS) circuitry of a same design, wherein each reticle area comprises:
at least one well circuit comprising a plurality of peripheral circuits in electrical communication with the plurality of electrodes in a well of the multiple-well array using a plurality of addressable switches coupled to each electrode;
a reference voltage bias terminal; and
an addressable switch located proximate to each electrode, the addressable switch configured to connect the reference voltage bias terminal to any set of the plurality of electrodes;
wherein the multiple-well array comprises at least 24 wells; and
wherein the multiple-well array includes at least 24 reticle areas to accommodate a standard number of wells in the multiple-well array.