US 12,264,980 B2
Stress sensor and methods of operating same
Alfio Zanchi, Huntington Beach, CA (US)
Assigned to The Boeing Company, Arlington, VA (US)
Filed by The Boeing Company, Chicago, IL (US)
Filed on Nov. 15, 2021, as Appl. No. 17/454,947.
Claims priority of provisional application 63/126,900, filed on Dec. 17, 2020.
Prior Publication US 2022/0196493 A1, Jun. 23, 2022
Int. Cl. G01L 1/22 (2006.01); G01L 5/1627 (2020.01)
CPC G01L 1/2262 (2013.01) [G01L 5/1627 (2020.01)] 22 Claims
OG exemplary drawing
 
1. A stress sensor circuit operable to generate a digital voltage output, the stress sensor circuit comprising:
a substrate configured to be subjected to mechanical stress; and
a bridge circuit disposed on the substrate and coupled between an output node of the bridge circuit and a ground node, the bridge circuit comprising:
a first branch having a first resistor of value R1, wherein the first resistor is coupled to a tunable resistor of value R at a first intermediate node;
a second branch having a second resistor of value R2, wherein the second resistor is coupled to a variable reference resistor of value Rref at a second intermediate node, and wherein the variable reference resistor is controlled to sweep through a plurality of discrete values Rref; and
an amplifier having a positive input terminal coupled to the first intermediate node, and a negative input terminal coupled to the second intermediate node, wherein the amplifier is configured to generate the digital voltage output at the output node as a function of the mechanical stress applied to the substrate and of the value Rref,
wherein the variable reference resistor is controlled to sweep through the plurality of discrete values Rref by increasing the value of Rref in an upward sweep from a first value to a second value and by decreasing the value Rref in a downward sweep from the second value to the first value so as toggle an output level of the digital voltage output, and
wherein the bridge circuit is self-referenced so that the digital voltage output is fed back to the first and second branches at the output node.