US 11,944,016 B2
Magnetoresistive random access memory and method of manufacturing the same
Hung-Chan Lin, Tainan (TW); Yu-Ping Wang, Hsinchu (TW); and Hung-Yueh Chen, Hsinchu (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Mar. 11, 2022, as Appl. No. 17/692,203.
Application 16/719,992 is a division of application No. 15/904,429, filed on Feb. 26, 2018, granted, now 10,593,865, issued on Mar. 17, 2020.
Application 17/692,203 is a continuation of application No. 16/719,992, filed on Dec. 19, 2019, granted, now 11,309,486.
Claims priority of application No. 201810076594.2 (CN), filed on Jan. 26, 2018.
Prior Publication US 2022/0199897 A1, Jun. 23, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H10B 61/00 (2023.01); H10N 50/01 (2023.01); H10N 50/10 (2023.01); H10N 50/80 (2023.01)
CPC H10N 50/80 (2023.02) [H10B 61/00 (2023.02); H10N 50/01 (2023.02); H10N 50/10 (2023.02)] 5 Claims
OG exemplary drawing
 
1. A magnetoresistive random access memory, comprising:
a substrate;
a conductive plug in said substrate, wherein said conductive plug has a notched portion on one side of the upper edge of said conductive plug;
a magnetic memory cell with a bottom electrode electrically connecting with said conductive plug, a magnetic tunnel junction on said bottom electrode and a top electrode on said magnetic tunnel junction, wherein a bottom surface of said magnetic memory cell and a top surface of said conductive plug completely align and overlap each other;
a conformal liner layer immediately on a surface of said notched portion and on sidewalls of said magnetic memory cell, wherein said conformal liner layer is not on a top surface of said top electrode; and
an overlying metal layer electrically connected with said top electrode, wherein said overlying metal layer contacts entire said top surface of said top electrode.