CPC H10K 59/1315 (2023.02) [G09G 3/3233 (2013.01); H10K 71/00 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0209 (2013.01); H10K 59/1201 (2023.02)] | 20 Claims |
1. A display substrate comprising: a substrate and a plurality of sub-pixels arrayed on the substrate, wherein the plurality of sub-pixels includes:
a first sub-pixel and a second sub-pixel alternately arranged along a second direction, the first sub-pixel includes a first data line pattern, the second sub-pixel includes a second data line pattern,
at least part of the first data line pattern and at least part of the second data line pattern extend along the second direction, and the first data line pattern is located at a first side of a same column of first sub-pixels extending along the second direction, the second data line pattern is located at a second side of a same column of second sub-pixels extending along the second direction,
the first side and the second side are opposite to each other along a first direction, the first direction intersects the second direction;
the first sub-pixel and the second sub-pixel each include:
a power signal line pattern, at least part of the power signal line pattern extending along the second direction;
a power compensation pattern, at least part of the power compensation pattern extending along the first direction, wherein the power signal line pattern and the power compensation pattern are both located on a side of the first data line pattern and the second data line pattern close to the substrate,
the power compensation pattern is electrically connected to the power signal line pattern and a power signal line pattern in an adjacent sub-pixel along the first direction.
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