CPC H10B 63/30 (2023.02) [H01L 29/401 (2013.01); H01L 29/785 (2013.01)] | 20 Claims |
1. A semiconductor device, comprising:
a first transistor, comprising:
a first gate structure over a first fin;
a first source/drain (S/D) feature;
a first conductive feature electrically coupled to the first S/D feature; and
a second conductive feature disposed on the first conductive feature;
a first resistive random access memory (RRAM) resistor; and
a second RRAM resistor, wherein
the first RRAM resistor comprises a first resistive material layer, a first electrode shared by the second RRAM resistor, a second electrode, a second gate structure over a second fin, and a second S/D feature electrically coupled to the second electrode;
the second RRAM resistor comprises the first electrode, a second resistive material layer, and a third electrode;
the first electrode is electrically coupled to the first transistor and protrudes from the second conductive feature of the first transistor; and
the first fin extends along a first direction, and the second fin extends along a second direction different from the first direction.
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