US 11,943,877 B2
Circuit board structure and manufacturing method thereof
Wen-Yu Lin, Taichung (TW); Kai-Ming Yang, Hsinchu County (TW); Chen-Hao Lin, Keelung (TW); Pu-Ju Lin, Hsinchu (TW); Cheng-Ta Ko, Taipei (TW); Chin-Sheng Wang, Taoyuan (TW); Guang-Hwa Ma, Hsinchu (TW); and Tzyy-Jang Tseng, Taoyuan (TW)
Assigned to Unimicron Technology Corp., Taoyuan (TW)
Filed by Unimicron Technology Corp., Taoyuan (TW)
Filed on Mar. 2, 2022, as Appl. No. 17/684,421.
Claims priority of application No. 111102869 (TW), filed on Jan. 24, 2022.
Prior Publication US 2023/0240023 A1, Jul. 27, 2023
Int. Cl. H05K 3/24 (2006.01); H01L 21/56 (2006.01); H01L 23/15 (2006.01); H01L 23/31 (2006.01); H01L 23/488 (2006.01); H01L 23/544 (2006.01); H05K 1/11 (2006.01); H05K 3/46 (2006.01)
CPC H05K 3/467 (2013.01) [H05K 1/112 (2013.01); H05K 2201/0191 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A circuit board structure, comprising:
a circuit substrate, having a first side and a second side opposite to each other, and comprising a first circuit layer disposed at the first side and a second circuit layer disposed at the second side;
a redistribution structure, disposed at the first side of the circuit substrate and electrically coupled to the circuit substrate, the redistribution structure comprising:
a first leveling dielectric layer, covering the first circuit layer of the circuit substrate;
a first thin-film dielectric layer, disposed on the first leveling dielectric layer, a material of the first thin-film dielectric layer being different from a material of the first leveling dielectric layer; and
a first redistributive layer, disposed on the first thin-film dielectric layer, wherein the first redistributive layer comprises:
a pad portion disposed on and in direct contact with an upper surface of the first thin-film dielectric layer; and
a via portion disposed between and in direct contact with the pad portion and the first circuit layer, wherein the via portion penetrates through the first thin-film dielectric layer and the first leveling dielectric layer such that the via portion is laterally and directly covered by the first thin-film dielectric layer and the first leveling dielectric layer;
a second redistributive layer, disposed on the pad portion of the first redistributive layer and electrically coupled to the first redistributive layer, a via portion of the second redistributive layer being finer than the via portion of the first redistributive layer; and
a dielectric structure, disposed at the second side of the circuit substrate and comprising a second leveling dielectric layer disposed below the second circuit layer of the circuit substrate.