CPC H04W 88/16 (2013.01) [G06F 1/10 (2013.01); H04B 15/02 (2013.01)] | 12 Claims |
1. A gateway device comprising:
a radio configured to operate in a 2.4 GHz Wi-Fi band to wirelessly communicate with a client device;
a 32 bit double data rate (DDR) memory having instructions stored therein;
a system clock configured to operate at a clock frequency of 533 MHz; and
a processor configured to execute the instructions stored on said memory to cause said gateway device to:
operate said 32 bit DDR memory at 1067 MHz to fall between harmonics of the system clock;
provide at least 20 megabits throughput at greater than 10 decibels of attenuation;
instruct said radio to transmit data to be transmitted in the 2.4 GHz Wi-Fi band that is not impacted by the clock frequency; and
instruct said radio to receive data to be received in the 2.4 GHz Wi-Fi band that is not impacted by the clock frequency.
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