CPC H04W 72/04 (2013.01) [H04L 1/1874 (2013.01); H04L 5/0044 (2013.01); H04L 25/03866 (2013.01)] | 20 Claims |
1. A base station, comprising:
at least one memory; and
at least one processor coupled with the at least one memory and configured to cause the base station to:
scramble and modulate coded bits for a plurality of redundancy versions (RVs) to generate data;
map a first RV of the plurality of RVs into a first downlink resource block and a second RV of the plurality of RVs into a second downlink resource block, both of which form a combined downlink resource block for a transmission of a single transport block and in which the first downlink resource block and the second downlink resource block of the combined downlink resource block are consecutive in a time domain, wherein the first downlink resource block is from a symbol with an indicated index of the combined downlink resource block to a symbol with an end index of the combined downlink resource block, the second downlink resource block is from a symbol with a start index to a symbol with an index of the combined downlink resource block equal to the indicated index minus one; and
transmit the data in the combined downlink resource block according to the mapping.
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