CPC H04N 19/52 (2014.11) [H04N 19/105 (2014.11); H04N 19/176 (2014.11); H04N 19/573 (2014.11); H04N 19/70 (2014.11)] | 3 Claims |
1. A decoding apparatus for image decoding, the decoding apparatus comprising:
a memory; and
at least one processor connected to the memory, the at least one processor configured to:
obtain image information including motion vector difference (MVD) information from a bitstream;
derive affine motion vector predictor (MVP) candidate list of a current block based on neighboring blocks of the current block;
derive control point motion vector predictors (CPMVPs) of the current block based on the affine MVP candidate list of the current block;
derive control point motion vector differences (CPMVDs) of the current block based on the MVD information;
derive control point motion vectors (CPMVs) of the current block based on the CPMVPs and the CPMVDs; and
generate prediction samples for the current block based on the CPMVs of the current block,
wherein the affine MVP candidate list comprises inherited affine candidates,
wherein the inherited affine candidates are derived based on candidate blocks coded by an affine prediction among spatial neighboring blocks of the current block,
wherein the inherited affine candidates comprises a first inherited affine candidate and a second inherited affine candidate,
wherein the first inherited affine candidate is derived from a first block group comprising a bottom-left corner neighboring block and a left neighboring block of the current block, and
wherein the second inherited affine candidate is derived from a second block group comprising a top-right corner neighboring block, a top neighboring block of the current block, and a top-left corner neighboring block.
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