US 11,942,756 B2
Radiation-emitting semiconductor chip with reflective inner surface and anti-reflective coating and method for producing thereof
Bruno Jentzsch, Regensburg (DE); and Alexander Tonkikh, Cork (IE)
Assigned to OSRAM OPTO SEMICONDUCTORS GMBH, Regensburg (DE)
Appl. No. 17/421,195
Filed by OSRAM Opto Semiconductors GmbH, Regensburg (DE)
PCT Filed Jan. 8, 2020, PCT No. PCT/EP2020/050301
§ 371(c)(1), (2) Date Jul. 7, 2021,
PCT Pub. No. WO2020/144226, PCT Pub. Date Jul. 16, 2020.
Claims priority of application No. 102019100532.9 (DE), filed on Jan. 10, 2019.
Prior Publication US 2022/0059985 A1, Feb. 24, 2022
Int. Cl. H01S 5/02255 (2021.01); H01L 33/00 (2010.01); H01L 33/44 (2010.01); H01L 33/46 (2010.01); H01S 5/028 (2006.01); H01S 5/40 (2006.01)
CPC H01S 5/02255 (2021.01) [H01L 33/0045 (2013.01); H01L 33/0093 (2020.05); H01L 33/44 (2013.01); H01L 33/46 (2013.01); H01S 5/0287 (2013.01); H01S 5/4012 (2013.01); H01S 5/4056 (2013.01); H01L 2933/0025 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A radiation emitting semiconductor chip comprising:
a semiconductor layer sequence having at least two active regions, which generate electromagnetic radiation during operation,
at least one reflective outer surface arranged laterally of each active region, and
an electrically insulating region arranged between the active regions, wherein
the electrically insulating region has a reflective inner surface arranged opposite the reflective outer surface,
the reflecting inner surface includes an angle of at least 35° and at most 55° with a main extension plane of the semiconductor chip
the reflecting outer surface includes an angle of at least 35° and at most 55° with a main extension plane of the semiconductor chip and
a reflective coating is arranged on the semiconductor layer sequence in a region of the reflective outer surface and an anti-reflective coating is arranged on the semiconductor layer sequence in the electrically insulating region, or
an anti-reflective coating is arranged on the semiconductor layer sequence in the region of the reflective outer surface and a reflective coating is arranged on the semiconductor layer sequence in the electrically insulating region.