US 11,942,542 B2
Semiconductor device and fabrication method thereof
Syed-Sarwar Imam, Bihar (IN); Chia-Hao Lee, Hsinchu County (TW); Chih-Hung Lin, Hsinchu County (TW); and Kun-Han Lin, Taoyuan (TW)
Assigned to Vanguard International Semiconductor Corporation, Hsinchu (TW)
Filed by Vanguard International Semiconductor Corporation, Hsinchu (TW)
Filed on Sep. 29, 2021, as Appl. No. 17/489,730.
Prior Publication US 2023/0100115 A1, Mar. 30, 2023
Int. Cl. H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/7816 (2013.01) [H01L 29/401 (2013.01); H01L 29/402 (2013.01); H01L 29/66681 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising: a substrate; a gate dielectric layer disposed on the substrate, wherein the gate dielectric layer includes a first portion having a first thickness, a second portion having a second thickness, and a third portion having a third thickness, and the first thickness, the second thickness and the third thickness are different from each other, and the first thickness is smaller than the second thickness and the third thickness; a gate electrode disposed on the first portion of the gate dielectric layer; a field plate disposed on and being in contact with top surfaces of both the second portion and the third portion of the gate dielectric layer, wherein the field plate is separated from and electrically coupled to the gate electrode; a source electrode disposed on one side of the gate electrode; and a drain electrode disposed on one side of the field plate.