US 11,942,529 B2
Semiconductor devices and methods of manufacturing thereof
Shih-Yao Lin, New Taipei (TW); Chih-Han Lin, Hsinchu (TW); and Hsiao Wen Lee, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jun. 7, 2022, as Appl. No. 17/834,614.
Application 17/834,614 is a continuation of application No. 17/037,120, filed on Sep. 29, 2020, granted, now 11,387,341.
Prior Publication US 2022/0302276 A1, Sep. 22, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/423 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01); H01L 21/3065 (2006.01)
CPC H01L 29/42392 (2013.01) [H01L 29/0673 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01); H01L 29/7831 (2013.01); H01L 29/78696 (2013.01); H01L 21/3065 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a plurality of semiconductor layers vertically separated from one another, wherein each of the plurality of semiconductor layers extends along a first lateral direction; and
a gate structure that extends along a second lateral direction and comprises at least a lower portion that wraps around each of the plurality of semiconductor layers;
wherein the lower portion of the gate structure includes:
a plurality of first gate sections, each of the first gate sections having a first curvature-based profile when viewed from its cross-section expanding over the first and second lateral directions; and
a plurality of second gate sections, each of the second gate sections having a second, different curvature-based profile when viewed from its cross-section expanding over the first and second lateral directions.