CPC H01L 27/14649 (2013.01) [H01L 27/146 (2013.01); H01L 27/1463 (2013.01); H01L 27/14632 (2013.01); H01L 27/14636 (2013.01); H01L 27/14643 (2013.01); H01L 27/14683 (2013.01); H01L 27/14687 (2013.01)] | 10 Claims |
1. A pixel structure of a stacked image sensor, comprising:
a first silicon wafer, which comprises:
a first photodiode array and control transistors located above;
a metal interconnect layer located below;
a second silicon wafer, which comprises:
a second photodiode array;
the second silicon wafer and the first silicon wafer are stacked up and down and bonded; wherein,
both of the first silicon wafer and the second silicon wafer are bulk silicon wafers;
upper surface of each first photodiode in the first photodiode array is exposed and flush with the upper surface of the first silicon wafer, upper and lower surfaces of each second photodiode in the second photodiode array are exposed and flush respectively with the upper and lower surfaces of the second silicon wafer, the upper surface of each the first photodiode is aligned with and bonded to the lower surface of the second photodiode correspondingly, upper surfaces other than the first photodiodes on the first silicon wafer is aligned with and bonded to lower surfaces other than the second photodiodes on the second silicon wafer correspondingly.
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