US 11,942,420 B2
Semiconductor device including recessed interconnect structure
Guo-Huei Wu, Tainan (TW); Hui-Zhong Zhuang, Kaohsiung (TW); Chih-Liang Chen, Hsinchu (TW); Cheng-Chi Chuang, New Taipei (TW); Shang-Wen Chang, Jhubei (TW); and Yi-Hsun Chiu, Zhubei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jun. 8, 2022, as Appl. No. 17/835,281.
Application 17/835,281 is a division of application No. 16/803,497, filed on Feb. 27, 2020, granted, now 11,444,018.
Prior Publication US 2022/0302026 A1, Sep. 22, 2022
Int. Cl. H01L 21/76 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 23/5283 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first gate structure extending along a first lateral direction;
a first interconnect structure, disposed above the first gate structure, that extends along a second lateral direction perpendicular to the first lateral direction, the first interconnect structure including a first portion and a second portion electrically isolated from each other by a first dielectric structure;
a second interconnect structure, disposed between the first gate structure and the first interconnect structure, that electrically couples the first gate structure to the first portion of the first interconnect structure,
wherein the second interconnect structure includes a recessed portion that is substantially aligned with the first gate structure and the first dielectric structure along a vertical direction, and wherein the recessed portion is separated from the first portion of the first interconnect structure with a dielectric recess structure along the vertical direction.