US 11,942,413 B2
Decoupling capacitors with back side power rails
Kam-Tou Sio, Zhubei (TW); and Jiann-Tyng Tzeng, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 8, 2021, as Appl. No. 17/370,902.
Prior Publication US 2023/0010409 A1, Jan. 12, 2023
Int. Cl. H01L 23/522 (2006.01); H01L 21/02 (2006.01); H01L 21/8238 (2006.01); H01L 23/528 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 23/5223 (2013.01) [H01L 21/0259 (2013.01); H01L 21/823807 (2013.01); H01L 21/823871 (2013.01); H01L 23/5286 (2013.01); H01L 27/092 (2013.01); H01L 29/0665 (2013.01); H01L 29/42392 (2013.01); H01L 29/66742 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate having a first side and a second side;
wherein the semiconductor device comprises, on the first side:
an active region that extends along a first lateral direction and comprises a first sub-region and a second sub-region;
a first gate structure that extends along a second lateral direction and is disposed over the active region, with the first and second sub-regions disposed on opposite sides of the first gate structure, wherein the second lateral direction is perpendicular to the first lateral direction; and
a first interconnecting structure electrically coupled to the first gate structure;
wherein the semiconductor device comprises, on the second side, a second interconnecting structure that is electrically coupled to the first and second sub-regions and is configured to provide a power supply;
wherein the active region, the first gate structure, the first interconnecting structure, and the second interconnecting structure are collectively configured as a decoupling capacitor; and
wherein the first interconnecting structure is vertically aligned with the active region.