US 11,942,406 B2
Semiconductor packages with embedded interconnects
Kyu Oh Lee, Chandler, AZ (US); Dilan Seneviratne, Chandler, AZ (US); and Ravindranadh T Eluri, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jun. 7, 2022, as Appl. No. 17/834,426.
Application 17/834,426 is a continuation of application No. 16/642,770, granted, now 11,393,745, previously published as PCT/US2017/054524, filed on Sep. 29, 2017.
Prior Publication US 2022/0302005 A1, Sep. 22, 2022
Int. Cl. H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01)
CPC H01L 23/49822 (2013.01) [H01L 21/4857 (2013.01); H01L 21/486 (2013.01); H01L 23/49811 (2013.01); H01L 23/49827 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16235 (2013.01); H01L 2924/014 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor package, comprising:
providing an interconnect bridge embedded within a build-up material formed on a surface of a sacrificial core, the interconnect bridge comprising an interconnect first side with a conductive pad and an interconnect second side opposite the interconnect first side, such that a distance between the interconnect first side and the surface is less than a distance between the interconnect second side and the surface;
forming a first via in the build-up material, wherein the first via has a first end that is narrower than a second end of the first via, and the first end is closer to the surface than the second end is to the surface;
providing, prior to removal of the sacrificial core, a temporary carrier on a side of the semiconductor package opposite to the sacrificial core;
removing the sacrificial core to expose the interconnect first side;
providing additional build-up material at the interconnect first side; and
forming a second via in the build-up material disposed at the interconnect first side, wherein the second via has a first end that is narrower than a second end, wherein the first end of the first via and the first end of the second via face opposite directions.