US 11,942,363 B2
Methods for forming stacked layers and devices formed thereof
Shih-Yao Lin, New Taipei (TW); Kuei-Yu Kao, Hsinchu (TW); Chen-Ping Chen, Toucheng Township (TW); and Chih-Han Lin, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Aug. 9, 2022, as Appl. No. 17/818,608.
Application 17/818,608 is a continuation of application No. 16/870,389, filed on May 8, 2020, granted, now 11,488,858.
Claims priority of provisional application 62/927,547, filed on Oct. 29, 2019.
Prior Publication US 2022/0384263 A1, Dec. 1, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/76 (2006.01); H01L 21/306 (2006.01); H01L 21/3065 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 21/02 (2006.01)
CPC H01L 21/76831 (2013.01) [H01L 21/30608 (2013.01); H01L 21/30655 (2013.01); H01L 21/823412 (2013.01); H01L 21/823431 (2013.01); H01L 27/0886 (2013.01); H01L 21/02236 (2013.01); H01L 21/02247 (2013.01); H01L 21/02381 (2013.01); H01L 21/0243 (2013.01); H01L 21/0245 (2013.01); H01L 21/02488 (2013.01); H01L 21/02507 (2013.01); H01L 21/02532 (2013.01); H01L 21/3065 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
depositing a first semiconductor layer, wherein the first semiconductor layer comprises:
a first bottom portion at a bottom of a trench in a semiconductor substrate; and
a first sidewall portion on a sidewall of the semiconductor substrate, with the sidewall of the semiconductor substrate facing the trench;
passivating the first semiconductor layer to form a first dielectric layer on a first remaining portion of the first semiconductor layer;
depositing a second semiconductor layer over the first dielectric layer, wherein the first semiconductor layer and the second semiconductor layer are formed of different semiconductor materials; and
passivating the second semiconductor layer to form a second dielectric layer over a second remaining portion of the second semiconductor layer.