US 11,942,358 B2
Low thermal budget dielectric for semiconductor devices
Mrunal Abhijith Khaderbad, Hsinchu (TW); Ko-Feng Chen, Hsinchu (TW); Zheng-Yong Liang, Hsinchu (TW); Chen-Han Wang, Zhubei (TW); De-Yang Chiou, Hsinchu (TW); Yu-Yun Peng, Hsinchu (TW); and Keng-Chu Lin, Ping-Tung (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Mar. 12, 2021, as Appl. No. 17/200,223.
Prior Publication US 2022/0293458 A1, Sep. 15, 2022
Int. Cl. H01L 21/762 (2006.01); H01L 21/311 (2006.01); H01L 21/8234 (2006.01)
CPC H01L 21/76224 (2013.01) [H01L 21/31116 (2013.01); H01L 21/823481 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming, on a substrate, first and second stacks of semiconductor layers with an opening in between, wherein the first and second stacks of semiconductor layers comprise first and second semiconductor layers stacked in an alternating configuration;
depositing a flowable isolation material in the opening;
densifying the deposited flowable isolation material with a plasma of oxygen radicals and hydrogen radicals; and
removing a portion of the densified flowable isolation material between the first and second stacks of semiconductor layers, wherein a top surface of the densified flowable isolation material is below bottom layers of the first and second stacks of semiconductor layers.