US 11,942,148 B2
Mixed-signal interface circuit for non-volatile memory crossbar array
Michael Flynn, Ann Arbor, MI (US); Seungjong Lee, Ann Arbor, MI (US); Seungheun Song, Ann Arbor, MI (US); and Justin Correll, Ann Arbor, MI (US)
Assigned to THE REGENTS OF THE UNIVERSITY OF MICHIGAN, Ann Arbor, MI (US)
Filed by THE REGENTS OF THE UNIVERSITY OF MICHIGAN, Ann Arbor, MI (US)
Filed on Apr. 22, 2022, as Appl. No. 17/727,210.
Claims priority of provisional application 63/178,943, filed on Apr. 23, 2021.
Prior Publication US 2022/0343976 A1, Oct. 27, 2022
Int. Cl. G11C 13/00 (2006.01); G06F 7/523 (2006.01)
CPC G11C 13/0026 (2013.01) [G06F 7/523 (2013.01); G11C 13/004 (2013.01); G11C 13/0069 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A computing system, comprising:
an array of memory cells arranged in columns and rows, such that memory cells in each row of the array is interconnected by a respective drive line and each column of the array is interconnected by a respective bit line;
each memory cell in a given group of memory cells is configured to receive an input signal indicative of a multiplier and operates to output a product of the multiplier and the value of the bit stored in the given memory cell onto the corresponding bit line of a given memory cell, where the value of the multiplier is encoded in the input signal; and
a plurality of drive circuits interfaced with the array of memory cells, each drive circuit is electrically connected to respective drive line in the array of memory cells and includes
a digital-to-analog converter operating at a low voltage level and configured to perform a read operation of memory cells connected to the respective drive line;
a writing subcircuit is configured to receive and operates to deliver a write signal to the respective drive line during a write operation, where voltage of the write signal is higher than the low voltage level; and
a write enabled switch is interposed between the digital-to-analog converter and the writing subcircuit and operates to electrically isolate the digital-to-analog converter from the writing subcircuit during the write operation.