US 11,941,294 B2
Memory controller for controlling suspension of operation and method of operating the same
Eui Dong Lee, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Jan. 6, 2022, as Appl. No. 17/570,022.
Claims priority of application No. 10-2021-0074347 (KR), filed on Jun. 8, 2021.
Prior Publication US 2022/0391140 A1, Dec. 8, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory controller for controlling a memory device, comprising:
a host interface configured to receive a request from a host;
a processor configured to generate a command corresponding to the request;
a command queue configured to store the generated command; and
a memory interface configured to provide the memory device with the command stored in the command queue or a suspend command, generated by the processor,
wherein, when a read request is input through the host interface while the memory device is performing an operation, the processor is further configured to:
determine a delay amount of time for output of the suspend command that instructs suspension of the operation, based on a number of read commands stored in the command queue, and
output, after the delay amount of time has elapsed, the suspend command, and
wherein a length of the delay amount of time depends on the number of read commands.