US 11,941,259 B2
Communication method, apparatus, computer-readable storage medium, and chip
Dongjiu Geng, Shanghai (CN); Chuanlong Yang, Hangzhou (CN); Yan Sang, Beijing (CN); and Qiangmin Lin, Hangzhou (CN)
Assigned to HUAWEI TECHNOLOGIES CO., LTD., Shenzhen (CN)
Filed by Huawei Technologies Co., Ltd., Shenzhen (CN)
Filed on Jul. 7, 2021, as Appl. No. 17/369,520.
Application 17/369,520 is a continuation of application No. PCT/CN2020/105344, filed on Jul. 29, 2020.
Claims priority of application No. 201910883765.7 (CN), filed on Sep. 18, 2019.
Prior Publication US 2021/0334018 A1, Oct. 28, 2021
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0622 (2013.01) [G06F 3/0655 (2013.01); G06F 3/0679 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A method for a computer system, the computer system comprising a first subsystem and a second subsystem, a first subsystem safety level of the first subsystem being higher than a second subsystem safety level of the second subsystem, the method comprising:
configuring, by a partition manager of the first subsystem, a first memory safety level of a first memory based on a safety level configuration file of the computer system, the safety level configuration file indicating the first memory safety level of the first memory;
configuring, by the partition manager, a memory access initiator safety level of a memory access initiator of the computer system;
writing, by the partition manager, a preconfigured memory safety level division information into a memory access checker of the computer system;
receiving, by the memory access checker, a memory access request from the memory access initiator, the memory access request comprising a first memory address of the first memory to be accessed by the memory access initiator and a memory access initiator safety level of the memory access initiator;
determining, by the memory access checker and based on the preconfigured memory safety level division information, whether the first memory safety level matches the memory access initiator safety level, the preconfigured memory safety level division information indicating safety levels of memories in different address segments of the computer system; and
allowing, by the memory access checker, the memory access initiator to access the first memory when the first memory safety level matches the memory access initiator safety level.