US 11,940,858 B2
Probe filter retention based low power state
Benjamin Tsien, Fremont, CA (US); and Amit P. Apte, Austin, TX (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Oct. 25, 2022, as Appl. No. 17/973,061.
Application 17/973,061 is a continuation of application No. 17/357,104, filed on Jun. 24, 2021, granted, now 11,487,340.
Prior Publication US 2023/0039289 A1, Feb. 9, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 1/3228 (2019.01); G06F 1/3234 (2019.01); G06F 1/3296 (2019.01); G06F 12/0831 (2016.01); G06F 13/26 (2006.01)
CPC G06F 1/3228 (2013.01) [G06F 1/3275 (2013.01); G06F 1/3296 (2013.01); G06F 12/0833 (2013.01); G06F 13/26 (2013.01); Y02D 10/00 (2018.01)] 20 Claims
OG exemplary drawing
 
1. A data processor comprising:
a data fabric for routing at least one request between a requestor and a responder, the data fabric comprising:
power state control circuitry which, responsive to a condition, causes a probe filter to enter a retention low power state in which a clock signal to the probe filter is gated while power is maintained to the probe filter.