CPC G05F 1/56 (2013.01) [G05F 1/462 (2013.01); G05F 1/67 (2013.01)] | 20 Claims |
14. A voltage regulator circuit, comprising:
a first set of digital devices that is to provide a first portion of current to a load;
a second set of analog devices that is to provide a second portion of current to the load, wherein the second set of analog devices is to reduce noise in the first portion of current to the load; and
a digital regulator to control the first set of digital devices, wherein the digital regulator is to:
receive a gate voltage of the second set of analog devices;
compare the gate voltage to a low reference and a high reference, respectively, wherein the low reference is smaller than the high reference, and wherein the high reference is based at least in part on an input voltage of the second set of analog devices and a minimum value of a target power supply rejection ratio (PSRR) of an output voltage to be provided to the load; and
generate a control signal to control a shift register of the first set of digital devices based on the respective comparisons of the gate voltage, wherein the shift register is to control respective power transistors of the first set of digital devices to be on or off.
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