US 12,262,646 B2
Magnetoresistive random access memory and method for fabricating the same
Hui-Lin Wang, Taipei (TW); Po-Kai Hsu, Tainan (TW); Ju-Chun Fan, Tainan (TW); Ching-Hua Hsu, Kaohsiung (TW); Yi-Yu Lin, Taichung (TW); and Hung-Yueh Chen, Hsinchu (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Dec. 25, 2023, as Appl. No. 18/395,646.
Application 18/395,646 is a continuation of application No. 17/088,531, filed on Nov. 3, 2020, granted, now 11,895,926.
Claims priority of application No. 202011083857.6 (CN), filed on Oct. 12, 2020.
Prior Publication US 2024/0130246 A1, Apr. 18, 2024
Int. Cl. H10N 50/80 (2023.01); H10B 61/00 (2023.01); H10N 50/01 (2023.01)
CPC H10N 50/80 (2023.02) [H10B 61/00 (2023.02); H10N 50/01 (2023.02)] 8 Claims
OG exemplary drawing
 
1. A method for fabricating a semiconductor device, comprising:
forming a magnetic tunneling junction (MTJ) and a top electrode on a substrate;
forming a spacer adjacent to the MTJ;
forming a second inter-metal dielectric (IMD) layer around the spacer;
forming a cap layer on the top electrode, the spacer, and the second IMD layer; and
patterning the cap layer to form a protective cap on and directly contacting top surfaces of the top electrode and the spacer, wherein a top surface of the protective cap is higher than a top surface of the second IMD layer.