US 12,262,610 B2
Organic light emitting diode display including plurality of pixels, storage capacitor, and wiring lines
Mi Hae Kim, Asan-si (KR); Min Ho Ko, Cheonan-si (KR); Seung Woo Sung, Incheon (KR); Ki Myeong Eom, Suwon-si (KR); and Jin Jeon, Seoul (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed by Samsung Display Co., Ltd., Yongin-si (KR)
Filed on Jan. 22, 2024, as Appl. No. 18/419,083.
Application 18/419,083 is a continuation of application No. 17/239,027, filed on Apr. 23, 2021, granted, now 11,903,271.
Application 17/239,027 is a continuation of application No. 16/792,410, filed on Feb. 17, 2020, granted, now 10,991,792, issued on Apr. 27, 2021.
Application 16/792,410 is a continuation of application No. 16/144,276, filed on Sep. 27, 2018, granted, now 10,566,406, issued on Feb. 18, 2020.
Application 16/144,276 is a continuation of application No. 15/630,632, filed on Jun. 22, 2017, granted, now 10,090,371, issued on Oct. 2, 2018.
Application 15/630,632 is a continuation of application No. 14/700,657, filed on Apr. 30, 2015, granted, now 9,691,837, issued on Jun. 27, 2017.
Claims priority of application No. 10-2014-0158977 (KR), filed on Nov. 14, 2014.
Prior Publication US 2024/0206257 A1, Jun. 20, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H10K 59/131 (2023.01); G09G 3/3225 (2016.01); G09G 3/3233 (2016.01); H10K 59/121 (2023.01); H10K 59/124 (2023.01); H01L 29/786 (2006.01)
CPC H10K 59/131 (2023.02) [G09G 3/3225 (2013.01); G09G 3/3233 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/124 (2023.02); G09G 2300/0819 (2013.01); G09G 2310/0262 (2013.01); G09G 2320/0238 (2013.01); G09G 2320/0276 (2013.01); G09G 2320/045 (2013.01); H01L 29/78696 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A display device, comprising:
a substrate;
a scan line on the substrate;
an emission control line extending substantially parallel to the scan line;
a data line crossing the scan line and the emission control line;
a driving voltage line crossing the scan line and the emission control line;
a pixel electrode on the substrate;
a first transistor electrically connected to the data line and the scan line;
a second transistor electrically connected to the pixel electrode;
a third transistor electrically connected to the driving voltage line, the first transistor and the second transistor;
a semiconductor layer on the substrate; and
a storage capacitor including a first storage electrode, wherein
the semiconductor layer comprises an intersecting portion;
the first transistor, the second transistor, and the third transistor are connected to each other through the intersecting portion;
the intersecting portion is arranged in an area defined by the scan line, the emission control line, the data line, and the driving voltage line;
a first portion of the semiconductor layer is substantially parallel to a portion of the data line and is not overlapped by the data line, and
at least a portion of the first portion of the semiconductor layer overlaps the first storage electrode in a plan view.