| CPC H10K 59/131 (2023.02) [G09F 9/301 (2013.01); H10K 77/111 (2023.02)] | 16 Claims |
|
1. A stretchable display panel having a plurality of island regions and a plurality of bridge regions, the plurality of island regions being arranged in an array, and every two adjacent island regions being connected with a bridge region in the plurality of bridge regions therebetween; wherein the plurality of bridge regions include a plurality of first bridge regions and a plurality of second bridge regions, a first bridge region in the plurality of first bridge regions is connected between two adjacent island regions in a first direction, and a second bridge region in the plurality of second bridge regions is connected between two adjacent island regions in a second direction, the first direction is a row direction in which the plurality of island regions are arranged in the array, and the second direction is a column direction in which the plurality of island regions are arranged in the array;
the display panel comprising:
a plurality of sub-pixels, at least one sub-pixel being provided in each island region; and
a plurality of signal line groups located in a same conductive layer; each signal line group extending along bridge regions to island regions that are connected to the bridge regions, the signal line group including a plurality of signal lines arranged in parallel and at intervals, each signal line being electrically connected to sub-pixels in the island regions;
wherein the plurality of signal line groups include:
a plurality of first signal line groups; each first signal line group extending in the first direction as a whole, and the first signal line group extending along the first bridge regions to island regions that are connected to the first bridge regions and being electrically connected to sub-pixels in the island regions; and
a plurality of second signal line groups; each second signal line group extending in the second direction as a whole, and the second signal line group extending along the second bridge regions to island regions that are connected to the second bridge regions and being electrically connected to sub-pixels in the island regions;
wherein the second signal line group includes at least one reference voltage signal line; and
the first signal line group includes at least one equipotential signal line, in the at least one equipotential signal line, an equipotential signal line includes a plurality of equipotential wiring segments, every two adjacent equipotential wiring segments are electrically connected to each other; each equipotential wiring segment extends along a first bridge region in the plurality of first bridge regions, and two ends of the equipotential wiring segment are electrically connected to reference voltage signal lines in two island regions that are connected to the first bridge region;
wherein the first signal line group further includes a plurality of control signal lines including at least a gate scanning signal line, an initialization signal line, a light-emitting signal line, and a reset signal line; and
the second signal line group further includes a plurality of data signal lines;
wherein a number of the control signal lines included in the first signal line group is less than a sum of a number of the reference voltage signal line and a number of the data signal lines included in the second signal line group; and a dimension of the first bridge region in the second direction is substantially equal to a dimension of the second bridge region in the first direction.
|