US 12,262,593 B2
Display panel and method of fabricating the same
Kyoungseok Son, Seoul (KR); Myounghwa Kim, Seoul (KR); Eoksu Kim, Seoul (KR); Taesang Kim, Seoul (KR); and Masataka Kano, Hwaseong-si (KR)
Assigned to Samsung Display Co., Ltd., Yongin-Si (KR)
Filed by Samsung Display Co., Ltd., Yongin-Si (KR)
Filed on Jan. 15, 2024, as Appl. No. 18/412,760.
Application 18/412,760 is a continuation of application No. 18/090,401, filed on Dec. 28, 2022, granted, now 11,877,479.
Application 18/090,401 is a continuation of application No. 17/116,943, filed on Dec. 9, 2020, granted, now 11,552,142, issued on Jan. 10, 2023.
Application 17/116,943 is a continuation of application No. 16/789,107, filed on Feb. 12, 2020, granted, now 10,892,308, issued on Jan. 12, 2021.
Application 16/789,107 is a continuation of application No. 16/133,404, filed on Sep. 17, 2018, granted, now 10,593,739, issued on Mar. 17, 2020.
Claims priority of application No. 10-2017-0168681 (KR), filed on Dec. 8, 2017.
Prior Publication US 2024/0155878 A1, May 9, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/78 (2006.01); H01L 27/12 (2006.01); H10K 50/11 (2023.01); H10K 50/844 (2023.01); H10K 59/121 (2023.01); H10K 59/122 (2023.01); H10K 59/123 (2023.01); H10K 59/124 (2023.01); H10K 59/131 (2023.01); H10K 71/00 (2023.01); H10K 77/10 (2023.01); H10K 59/12 (2023.01); H10K 102/00 (2023.01)
CPC H10K 59/122 (2023.02) [H01L 27/1225 (2013.01); H01L 27/124 (2013.01); H01L 27/1288 (2013.01); H10K 50/11 (2023.02); H10K 50/844 (2023.02); H10K 59/1213 (2023.02); H10K 59/123 (2023.02); H10K 59/124 (2023.02); H10K 59/131 (2023.02); H10K 71/00 (2023.02); H10K 77/111 (2023.02); H10K 59/1201 (2023.02); H10K 2102/311 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A display panel, comprising:
a base layer including a first region and a second region that is bent from the first region along a predetermined bending axis;
a first thin-film transistor disposed in the first region;
a second thin-film transistor disposed in the first region;
a first inorganic layer includes a first groove that overlaps the second region;
a second inorganic layer includes a second groove that overlaps the first groove;
a first organic layer disposed in the first region and the second region to cover inner surfaces of the first and second grooves;
a connection electrode disposed on the first organic layer and connected to the first thin-film transistor through a contact hole;
a signal line disposed in the second region and overlapping the first groove and the second groove; and
a second organic layer disposed on the connection electrode,
wherein the signal line comprises a same material as the connection electrode;
wherein the second organic layer is in contact with the first organic layer in the second region; and
wherein the first organic layer is disposed to be in contact with a portion of a top surface of the base layer in the second region.