CPC H10H 20/01 (2025.01) [H01L 21/2633 (2013.01); H01L 21/461 (2013.01)] | 10 Claims |
1. A method of manufacturing a semiconductor structure, comprising:
providing a substrate, wherein the substrate comprises a plurality of component areas and peripheral areas surrounding the plurality of component areas;
forming a sacrificial layer on the substrate and patterning the sacrificial layer to obtain a remaining sacrificial layer on each of the plurality of component areas;
forming a semiconductor active layer on the remaining sacrificial layer on each of the plurality of component areas and the substrate, and patterning the semiconductor active layer to remove semiconductor active layer in the peripheral areas so as to form a plurality of annular grooves and obtain remaining semiconductor active layers, spaced from each other by the plurality of annular grooves, on the plurality of component areas, and a sidewall of the remaining sacrificial layer on each of the plurality of component areas is exposed in the annular grooves;
removing the remaining sacrificial layer on each of the plurality of component areas through the annular grooves, such that a remaining semiconductor active layer on each of the plurality of component areas is separated from the substrate, wherein the remaining semiconductor active layer on each of the component areas that is independent forms a semiconductor structure.
|