| CPC H10B 61/22 (2023.02) [H10N 50/01 (2023.02); H10N 50/80 (2023.02)] | 9 Claims |

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1. A method for fabricating a semiconductor device, comprising:
forming a magnetic tunneling junction (MTJ) on a substrate;
forming a first spin orbit torque (SOT) layer on the MTJ;
forming a passivation layer around the MTJ;
forming a second SOT layer on the first SOT layer and the passivation layer; and
patterning the second SOT layer and the passivation layer.
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