US 12,262,526 B2
Semiconductor devices and methods of fabricating the same
Sungyeon Ryu, Chuncheon-si (KR); and Eunjung Kim, Daegu (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Dec. 14, 2023, as Appl. No. 18/540,076.
Application 18/540,076 is a division of application No. 17/193,476, filed on Mar. 5, 2021, granted, now 11,889,679.
Claims priority of application No. 10-2020-0099387 (KR), filed on Aug. 7, 2020.
Prior Publication US 2024/0130107 A1, Apr. 18, 2024
Int. Cl. H01L 21/762 (2006.01); H01L 49/02 (2006.01); H10B 12/00 (2023.01)
CPC H10B 12/30 (2023.02) [H01L 28/60 (2013.01); H10B 12/033 (2023.02)] 8 Claims
OG exemplary drawing
 
1. A method of fabricating a semiconductor device, comprising:
forming a plurality of trenches in a substrate, the plurality of trenches defining active patterns between the plurality of trenches;
forming a protection layer to conformally cover top surfaces of the active patterns and to cover bottom surfaces of the plurality of trenches and inner side surfaces of the plurality of trenches;
forming a sacrificial layer to fill remaining portions of the plurality of trenches;
forming supporting patterns to cover a portion of the protection layer and to cover the sacrificial layer;
forming a protection pattern between the supporting pattern and the active patterns;
removing the sacrificial layer;
filling a lower oxide layer to fill the portions of the plurality of trenches from which the sacrificial layer is removed;
removing the supporting pattern; and
forming an upper oxide layer to cover the protection pattern and the lower oxide layer.