| CPC H04W 40/32 (2013.01) [H04L 12/00 (2013.01); H04L 12/413 (2013.01); H04W 12/0431 (2021.01); H04W 40/244 (2013.01); H04W 56/001 (2013.01); H04W 72/0446 (2013.01); H04L 45/22 (2013.01); H04L 45/7453 (2013.01)] | 9 Claims |

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1. A network system comprising:
a plurality of devices wherein a substantial portion of the plurality of devices are configured for transmitting data, receiving data, or a combination thereof;
at least one clock master configured to resynchronize at least a portion of the plurality of devices in order to avoid internal interference;
wherein the at least one clock master is elected from among the plurality of devices; and
wherein at least one device from the plurality of devices may vote for the at least one clock master if the at least one device has not received a portion of a predefined number of consecutive packets from at least one previous clock master.
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