US 12,262,010 B2
Encoder, decoder, encoding method, and decoding method
Chong Soon Lim, Singapore (SG); Hai Wei Sun, Singapore (SG); Sughosh Pavan Shashidhar, Singapore (SG); Han Boon Teo, Singapore (SG); Ru Ling Liao, Singapore (SG); Takahiro Nishi, Nara (JP); and Tadamasa Toma, Osaka (JP)
Assigned to Panasonic Intellectual Property Corporation of America, Torrance, CA (US)
Filed by Panasonic Intellectual Property Corporation of America, Torrance, CA (US)
Filed on Aug. 3, 2023, as Appl. No. 18/365,054.
Application 18/365,054 is a continuation of application No. 18/364,978, filed on Aug. 3, 2023.
Application 18/364,978 is a continuation of application No. 18/343,393, filed on Jun. 28, 2023.
Application 18/343,393 is a continuation of application No. 17/580,344, filed on Jan. 20, 2022, granted, now 11,736,693.
Application 17/580,344 is a continuation of application No. 16/833,174, filed on Mar. 27, 2020, granted, now 11,350,091, issued on May 31, 2022.
Application 16/833,174 is a continuation of application No. 16/417,509, filed on May 20, 2019, granted, now 10,652,536, issued on May 12, 2020.
Application 16/417,509 is a continuation of application No. PCT/JP2017/041421, filed on Nov. 17, 2017.
Claims priority of provisional application 62/424,716, filed on Nov. 21, 2016.
Claims priority of provisional application 62/424,663, filed on Nov. 21, 2016.
Claims priority of provisional application 62/424,790, filed on Nov. 21, 2016.
Prior Publication US 2023/0396763 A1, Dec. 7, 2023
Int. Cl. H04N 19/119 (2014.01); H04N 19/176 (2014.01); H04N 19/50 (2014.01); H04N 19/60 (2014.01)
CPC H04N 19/119 (2014.11) [H04N 19/176 (2014.11); H04N 19/50 (2014.11); H04N 19/60 (2014.11)] 5 Claims
OG exemplary drawing
 
1. An encoder that encodes a block of an image, the encoder comprising:
a processor; and
memory connected to the processor,
wherein, using the memory, the processor:
determines prediction mode information;
determines a set of partition modes in accordance with the prediction mode information, wherein the determining the set of partition modes includes:
in response to the prediction mode information indicating an inter prediction mode, determining a first set of partition modes; and
in response to the prediction mode information indicating an intra prediction mode, determining a second set of partition modes;
selects a partition mode from the determined set of partition modes in accordance with the prediction mode information;
writes a parameter into a bitstream;
partitions a block into a plurality of sub blocks using the selected partition mode; and
encodes a sub block included in the plurality of sub blocks in an encoding process, wherein the processor:
partitions the block into three sub blocks, each having a width and a height that are powers of two, and sets the parameter to a first value in response; and
partitions the block into an even number of sub blocks, each of the even number of sub blocks having a same size, and sets the parameter to a second value in response, the second value being different from the first value.