US 12,261,706 B2
Data transmission/reception device in semiconductor system for reducing current consumption
Jae Jin Lee, Gwangju-si (KR)
Assigned to FIDELIX CO., LTD., Seongnam-si (KR)
Filed by FIDELIX CO., LTD., Seongnam-si (KR)
Filed on May 8, 2023, as Appl. No. 18/313,771.
Claims priority of application No. 10-2022-0104059 (KR), filed on Aug. 19, 2022.
Prior Publication US 2024/0064034 A1, Feb. 22, 2024
Int. Cl. H04B 3/00 (2006.01); H04L 12/10 (2006.01)
CPC H04L 12/10 (2013.01) 12 Claims
OG exemplary drawing
 
1. A data transmission/reception device comprising:
a data bus;
a data transmission circuit that recognizes 1-st to m-th standard data, receives a transmission data including 1-st to n-th transmission bit signals, loads a code data including 1-st to p-th code bit signals into the data bus, and generates a flag signal, wherein at least one of the 1-st to p-th code bit signals is activated in case that the data value of the transmission data corresponds to any one of the 1-st to m-th standard data, and the flag signal is activated in case that the data value of the transmission data corresponds to any one of the 1-st to m-th standard data, and
a data reception circuit that receives the flag signal and the code data transmitted through the data bus, and recovers the code data into a reception data according to activation of the flag signal, wherein the reception data includes 1-st to n-th reception bit signals, wherein
‘m’ is a natural number greater than or equal to 1,
‘n’ is a natural number greater than or equal to 2,
‘p’ is a natural number less than ‘n’,
the data transmission circuit includes:
a code generating part that is driven to activate at least one of the 1-st to p-th code bit signals of the code data corresponding to a data value of the transmission data in case that the data value of the transmission data corresponds to any one of the 1-st to m-th standard data;
a flag generating part that generates the flag signal, the flag signal being activated according to activation of at least one of the 1-st to p-th code bit signals of the code data; and
a transmission selecting part that is driven to load the code data into the data bus according to activation of the flag signal,
an i-th code bit signal of the code data is activated as the data value of the transmission data corresponds to the data value of an i-th standard data,
‘m’ is equal to ‘p’,
‘i’ is a natural number in a range of ‘1’ to ‘p’
the data bus includes 1-st to n-th data lines,
the transmission selecting part includes 1-st to p-th transmission selecting subparts,
an i-th transmission selecting subpart is driven to load the i-th transmission bit signal of the transmission data into an i-th data line according to inactivation of the flag signal, and load the i-th code bit signal of the code data into the i-th data line according to activation of the flag signal,
the data transmission circuit further includes a termination signal generating part that generates (p+1)-th to n-th termination signals, the transmission selecting part further including (p+1) to n-th transmission selecting subparts,
a j-th transmission selecting subpart is driven to load a j-th transmission bit signal of the transmission data into a i-th data line according to inactivation of the flag signal, and load the j-th signal of the code data into the j-th data line according to activation of the flag signal, and
‘j’ is a natural number in a range of ‘(p+1)’ to ‘n’.