US 12,261,695 B1
Configuring arbitrary jumps in a linear feedback shift register in wireless communications
Dinesh Dharmaraju, San Diego, CA (US); Anthony Fanous, San Diego, CA (US); and David Hoyle, Tideswell (GB)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Sep. 19, 2023, as Appl. No. 18/470,172.
Int. Cl. G06F 11/00 (2006.01); G06F 7/58 (2006.01); H04L 1/00 (2006.01)
CPC H04L 1/0073 (2013.01) [G06F 7/584 (2013.01); H04L 1/0016 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus for wireless communication, comprising:
a transceiver;
one or more memories configured to, individually or in combination, store instructions; and
one or more processors communicatively coupled with the one or more memories, wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to:
select a base representation for expressing an advance offset value for generating a shift register sequence to achieve jumps between values of the shift register sequence;
generate, based on the advance offset value, the shift register sequence; and
process a signal based at least in part on the shift register sequence.