US 12,261,611 B2
Clock signal transitioning for multi-mode audio processing systems
Jianqi Chen, Austin, TX (US); Jaiminkumar Mehta, Austin, TX (US); Bhoodev Kumar, Austin, TX (US); and John L. Melanson, Austin, TX (US)
Assigned to Cirrus Logic, Inc., Austin, TX (US)
Filed by Cirrus Logic International Semiconductor Ltd., Edinburgh (GB)
Filed on Jul. 16, 2023, as Appl. No. 18/353,094.
Prior Publication US 2025/0023573 A1, Jan. 16, 2025
Int. Cl. H03L 7/099 (2006.01); H03L 7/093 (2006.01)
CPC H03L 7/0991 (2013.01) [H03L 7/093 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a clock controller comprising a digitally controlled oscillator (DCO), the clock controller configured to perform operations comprising:
receiving a first input signal corresponding to a first operating mode having a first resolution for the DCO and a second input signal corresponding to a second operating mode having a second resolution for the DCO lower than the first resolution;
determining, based on the first input signal, a first control word for an output clock signal during the first operating mode;
determining a transition control word for determining the output clock signal during a transition from the first operating mode to the second operating mode; and
determining, based on the second input signal, a second control word for an output signal during the second operating mode.