US 12,261,579 B2
Continuous time linear equalizer
Jae Duk Han, Seoul (KR); Eun Ji Song, Seoul (KR); Gi Jin Park, Seoul (KR); and Jeong Kyoum Kim, Icheon (KR)
Assigned to SK hynix, Icheon (KR); and Industry-University Cooperation Foundation Hanyang University, Seoul (KR)
Filed by SK hynix Inc., Icheon (KR); and Industry-University Cooperation Foundation Hanyang University, Seoul (KR)
Filed on May 23, 2022, as Appl. No. 17/751,391.
Claims priority of application No. 10-2021-0170049 (KR), filed on Dec. 1, 2021.
Prior Publication US 2023/0170880 A1, Jun. 1, 2023
Int. Cl. H03H 11/04 (2006.01); H03H 7/38 (2006.01)
CPC H03H 11/04 (2013.01) [H03H 7/38 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A continuous time linear equalizer, comprising:
a T-coil circuit including a capacitive load connected to one path of parallel-connected paths and at least two serially connected inductive loads connected to the other path of the parallel-connected paths;
an input of a first filter connected to the one path;
an input of a second filter connected between the two serially connected inductive loads; and
a coupling unit configured to couple an output of the first filter and an output of the second filter to each other.