US 12,261,569 B2
Demodulation device and demodulation method
Daisuke Kimura, Ashiya (JP)
Assigned to FURUNO ELECTRIC COMPANY LIMITED, Hyogo (JP)
Filed by FURUNO ELECTRIC CO., LTD., Hyogo (JP)
Filed on Jun. 21, 2023, as Appl. No. 18/339,134.
Application 18/339,134 is a continuation in part of application No. PCT/JP2022/000460, filed on Jan. 11, 2022.
Claims priority of application No. 2021-021996 (JP), filed on Feb. 15, 2021.
Prior Publication US 2023/0336124 A1, Oct. 19, 2023
Int. Cl. H03D 3/00 (2006.01); H04L 27/00 (2006.01); H04L 27/227 (2006.01); H04L 27/233 (2006.01); H04L 27/38 (2006.01)
CPC H03D 3/007 (2013.01) [H04L 27/227 (2013.01); H04L 27/2273 (2013.01); H04L 27/233 (2013.01); H04L 27/3872 (2013.01); H04L 2027/0057 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A demodulation device comprising:
processing circuitry configured:
to rotate phases of an I-Phase signal and a Q-Phase signal in a received signal of a multilevel PSK signal using a reference signal;
to adjust the phases of the phase rotated I-Phase signal and the phase rotated Q-Phase signal by multiplying the phases of the phase rotated I-Phase signal and the phase rotated Q-Phase signal with an integer value to generate a phase adjusted I-Phase signal and a phase adjusted Q-Phase signal;
to compare the phase of the phase adjusted I-Phase signal with the phase of the phase adjusted Q-Phase signal to generate a phase comparison result; and
to generate a reference signal using the phase comparison result.