US 12,261,529 B2
Power-save mode for fixed-frequency DC-DC converter
Antonio Priego, Freising (DE); Gerhard Thiele, Dachau (DE); and Erich-Johann Bayer, Freising (DE)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Sep. 29, 2022, as Appl. No. 17/955,950.
Claims priority of provisional application 63/324,428, filed on Mar. 28, 2022.
Prior Publication US 2023/0308019 A1, Sep. 28, 2023
Int. Cl. H02M 3/158 (2006.01); H02M 1/00 (2006.01); H03F 3/345 (2006.01); H03K 17/06 (2006.01); H03K 17/687 (2006.01); H03K 19/173 (2006.01)
CPC H02M 3/158 (2013.01) [H02M 1/0032 (2021.05); H03F 3/345 (2013.01); H03K 17/063 (2013.01); H03K 17/687 (2013.01); H03K 19/173 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A circuit comprising:
an amplifier having an amplifier output and first and second amplifier inputs, in which the first amplifier input is coupled to a reference voltage terminal, and the second amplifier input is coupled to an output voltage terminal;
a comparator having a comparator output and first and second comparator inputs, in which the first comparator input is coupled to the amplifier output, and the second comparator input is coupled to a switching terminal;
a logic circuit having first, second and third logic inputs and first and second logic outputs, in which the first logic input is coupled to the comparator output, and the second logic input is coupled to a clock terminal;
a driver circuit having first and second driver inputs and first and second driver outputs, in which the first driver input is coupled to the first logic output, and the second driver input is coupled to the second logic output;
a first transistor coupled between a supply voltage terminal and the switching terminal and having a first control terminal, in which the first control terminal is coupled to the first driver output;
a second transistor coupled between the switching terminal and a ground terminal and having a second control terminal, in which the second control terminal is coupled to the second driver output;
a threshold detection circuit having a threshold detection input and a threshold detection output, in which the threshold detection input is coupled to the second transistor, the threshold detection output is coupled to the third logic input, and the threshold detection circuit is configured to provide a threshold signal at the threshold detection output responsive to a current through the second transistor crossing a current threshold; and
a slope compensation circuit coupled between the second comparator input and the output voltage terminal, wherein the slope compensation circuit includes:
a capacitor coupled between the second comparator input and a compensation terminal;
a resistor coupled between the compensation terminal and the output voltage terminal; and
a third transistor having a third control terminal, in which the third transistor is coupled between the compensation terminal and the ground terminal, and the third control terminal is coupled to the second driver output.