US 12,261,522 B2
Efficiency improvement for power factor correction based AC-DC power adapters
Hariom Rai, Bangalore (IN); Arun Khamesra, Bangalore (IN); and Aniket Shashikant Mathad, Bengaluru (IN)
Assigned to Cypress Semiconductor Corporation, San Jose, CA (US)
Filed by Cypress Semiconductor Corporation, San Jose, CA (US)
Filed on Jun. 9, 2022, as Appl. No. 17/836,873.
Prior Publication US 2023/0402914 A1, Dec. 14, 2023
Int. Cl. H02M 1/42 (2007.01); H02M 7/217 (2006.01)
CPC H02M 1/4208 (2013.01) [H02M 7/217 (2013.01)] 15 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a transformer;
a primary-side controller coupled to the transformer;
a power factor correction (PFC) component coupled to the primary-side controller; and
a secondary-side controller coupled to the transformer, wherein the secondary-side controller is configured at least to:
obtain data informative of an amount of power;
determine whether the amount of power satisfies a power threshold condition; and
in response to determining that the amount of power satisfies the power threshold condition, cause the PFC component to operate in a PFC-disable mode by generating a PFC control signal that causes the primary-side controller to modulate a level of a PFC-disable signal.